Combinational circuits produce outputs that depend only on current inputs. Sequential circuits also depend on stored past state, which is how computers remember things. The building block of that memory is the flip-flop.

The SR latch and SR flip-flop

An SR flip-flop is built from two cross-coupled NOR (or NAND) gates. It has two inputs, Set (S) and Reset (R), and outputs Q and its inverse Q’.

S R Q (next)
0 0 no change (holds)
0 1 0 (reset)
1 0 1 (set)
1 1 invalid

The S=1, R=1 state is invalid because both outputs would be forced to the same value, and the result is unpredictable when both inputs are released. The feedback from each gate’s output to the other gate’s input is what lets the circuit hold a bit.

The JK and D flip-flops

The JK flip-flop fixes the invalid state. J acts like Set and K like Reset, but J=1, K=1 makes the output toggle (flip to the opposite value).

J K Q (next)
0 0 no change
0 1 0
1 0 1
1 1 toggles

The D flip-flop (data or delay) has a single data input D. On each clock pulse, Q takes the value of D. It is the simplest way to store one bit and is the basis of registers.

Flip-flops are clocked: they only change state on a clock edge (rising or falling), which keeps all parts of a system synchronised.

Using flip-flops

  • Registers: a row of D flip-flops sharing one clock stores a multi-bit value, such as 8 flip-flops for one byte.
  • Counters: JK flip-flops wired with J=K=1 toggle on each pulse, so each stage halves the clock frequency. Chaining n stages gives a binary counter that counts 0 to 2^n – 1.
  • Shift registers: the output of each D flip-flop feeds the next, moving bits along on each clock pulse. These are used in serial communication.

Example: a 2-bit counter made from two toggling flip-flops steps through 00, 01, 10, 11, then back to 00.

Clock pulses:  1    2    3    4
Output Q1Q0:   01   10   11   00

Check your understanding

What is the main difference between combinational and sequential logic?

  • Sequential logic has no gates
  • Sequential output depends on stored previous state as well as inputs
  • Combinational logic uses a clock
  • Sequential logic is always faster

Answer: Sequential output depends on stored previous state as well as inputs. That stored state is the memory.

Why is S=1, R=1 invalid in an SR flip-flop?

  • It resets the circuit
  • Both outputs are forced to the same value and the final state is unpredictable
  • It toggles the output
  • It stops the clock

Answer: Both outputs are forced to the same value and the final state is unpredictable. The JK design removes this problem.

A JK flip-flop has J=1, K=1 on a clock pulse. What happens to Q?

  • It stays the same
  • It becomes 0
  • It becomes 1
  • It toggles

Answer: It toggles. This behaviour is used in counters.

Which device stores one bit by copying D to Q on the clock edge?

  • D flip-flop
  • Half adder
  • Multiplexer
  • Decoder

Answer: D flip-flop. A group of them forms a register.

PreviousNext